The present invention relates to development systems, such as development systems for software and circuit design.
There is a large number of programming languages that are used in modern development projects. Examples of common general purpose programming languages include C and C++. Specialized programming languages are also used for specific types of development projects. For instance, many electrical circuits and systems are designed and modeled using specialized programming languages referred to as HDLs (Hardware Description Languages). Examples of commonly used HDLs include VHDL and Verilog.
It is sometimes desirable to use general purpose programming languages for specialized development projects. For example, if it is desired to use the C++ language for electrical hardware design and modeling, this language can be modified to add hardware-oriented constructs as a class library. This type of use for general programming languages may span design and verification from concept to implementation in hardware and software. An example of a commonly adopted standard for implementing these modifications to the C++ language is the SystemC initiative, which provides an interoperable modeling platform that enables the development and exchange of very fast system-level C++ models. Further information about the SystemC initiative can be obtained from the Open SystemC Initiative (OSCI), which has a website at “www.systemc.org.”
It is also sometimes desirable to implement a design using a mixture of two or more programming languages. With electrical circuit designs, for example, this may result in a design that is implemented using both Verilog and C++, or a design having both VHDL and SystemC components. There may be a number of reasons for this, e.g., to reuse and link in modules developed in another language, because it is easier to perform certain operations or implement certain component properties in one type of language versus another type of language, or because of a desire to use legacy systems and developments.
When simultaneously working with multiple programming languages, incompatibilities in the interface, operations, or processing of the different languages may cause problems during the development project. Consider if it is required to debug a electrical design involving both an HDL and a general purpose programming language such as C++. A circuit simulator may be used to debug the HDL portion of the design while an external C++ debugger may be used to debug the C++ portion of the design. It is often useful during the debugging process to switch back and forth between the two types of languages.
For example, when debugging the C++ code, the designer may see a value that came from the HDL code, so the designer may want to go to design to look at values of the HDL code. But in typical design systems, this may not possible since the external debugger operating upon the C++ portion of the design may interrupt the simulator during its debug operation. If the simulator is interrupted, then it may not be possible to operate the simulator interface to produce the desired result or retrieve values from the simulator. This highlights a significant disadvantage of conventional debugging environments for designs having mixed HDL and general programming language code, which suffer from the limitation of the HDL code becoming inaccessible when the general purpose programming language portion is debugged.
An embodiment of the present invention is directed to a method, mechanism, and computer usable medium for simultaneous processing or debugging of multiple programming languages. A particular embodiment provides a method and mechanism for resolving the issue of simultaneous debugging of hardware represented by an HDL, e.g., Verilog or VHDL, and software, e.g., represented by C, C++, SystemC code.
Further details of aspects, objects, and advantages of the invention are described below in the detailed description, drawings, and claims.